> In the GaN FET, on the other hand, the two-dimensional electron gas already exists naturally. So a positive voltage applied to the drain immediately pushes current from source to drain. Thus the amount of current is varied by applying a negative voltage to the gate, which restricts the number of electrons available to flow from source to drain. A large enough negative voltage turns off the flow altogether. Thus in contrast to a silicon FET, which is normally off, a GaN FET is normally on.
(Somewhat misleading; silicon FETs that are "normally off" are enhancement-mode transistors. Of course, there are depletion-mode MOSFETs, and of course JFETs. There are even power MOSFETS that are depletion mode, see here:
http://www.ixys.com/documents/appnotes/ixan0063.pdf
In any case, this confirms the new transistor to be a depletion mode device. This has implications for biasing which could be inconvenient in some applications. In any case, it means it's not simply drop-in replacement for enhancement-mode MOSFETs in existing designs.)
> One of us (Mishra) has succeeded in making bipolar GaN transistors. But they are not yet as reliable as the FETs because at the moment it is very difficult to make p-type material good enough to use in a bipolar transistor. Applying electrical contacts to the material, as is necessary to connect the device into a circuit, often wiped out the semiconductor's p-type character.
If these challenges are solved, the idea of a new kind of BJT is exciting.
Biasing is indeed non-trivial, and most designs require temperature compensation to keep drain current constant. In fact, it's pretty easy to fry a GaN part without proper bias sequencing at power-on and off. At least it is with the parts I'm using.
Edit: parts like MAX881R [1] make it pretty easy though :)
I've used the MAX881 for some lower power GaAs, but it's limited to a few mA gate current. TI has an opamp I used that can drive capacitive loads with +/- 30 mA, so it makes a good gate driver, whilst allowing a decent amount of gate bypass capacitance. For temp comp I have found once you get the temp vs IDS curve, it's identical for devices within a lot, and only need to offset for pinchoff, which varies device to device within the same lot.
Both depletion-mode and enhancement-mode GaN devices exist now. The former can be turned into a "normally off" device by combining it with a low voltage Si FET to form a cascode [1]
http://spectrum.ieee.org/semiconductors/materials/the-toughe...
Highlights:
> In the GaN FET, on the other hand, the two-dimensional electron gas already exists naturally. So a positive voltage applied to the drain immediately pushes current from source to drain. Thus the amount of current is varied by applying a negative voltage to the gate, which restricts the number of electrons available to flow from source to drain. A large enough negative voltage turns off the flow altogether. Thus in contrast to a silicon FET, which is normally off, a GaN FET is normally on.
(Somewhat misleading; silicon FETs that are "normally off" are enhancement-mode transistors. Of course, there are depletion-mode MOSFETs, and of course JFETs. There are even power MOSFETS that are depletion mode, see here: http://www.ixys.com/documents/appnotes/ixan0063.pdf In any case, this confirms the new transistor to be a depletion mode device. This has implications for biasing which could be inconvenient in some applications. In any case, it means it's not simply drop-in replacement for enhancement-mode MOSFETs in existing designs.)
> One of us (Mishra) has succeeded in making bipolar GaN transistors. But they are not yet as reliable as the FETs because at the moment it is very difficult to make p-type material good enough to use in a bipolar transistor. Applying electrical contacts to the material, as is necessary to connect the device into a circuit, often wiped out the semiconductor's p-type character.
If these challenges are solved, the idea of a new kind of BJT is exciting.